Celeron J1750 Firmware

Vendor:

First CVE: Nov 14, 2019 · Active for 6 years

13
Total CVEs
More Total CVEs than 92% of tracked products
2.6
Avg CVEs / Year
Higher CVE frequency than 78% of tracked products
5.9
Avg CVSS
Higher Avg CVSS than 23% of tracked products
0.0%
KEV Rate
Bottom 1%

Trends Over Time

The number and severity of CVEs published that impact Celeron J1750 Firmware over time

Volume of CVEsAvg CVSS Base Score
First CVE
Nov 14, 2019
6 years ago
Most Recent CVE
Nov 14, 2023
987 days ago

CVE Severity & Scoring

Celeron J1750 Firmware13 CVEs
All CVEs353,240 CVEs
LowMediumHigh
Attack Vector
Local10 (76.9%)
Network0 (0.0%)
Unknown0 (0.0%)
Physical1 (7.7%)
Adjacent Network2 (15.4%)
Attack Complexity
Low12 (92.3%)
High1 (7.7%)
Unknown0 (0.0%)
User Interaction
None12 (92.3%)
Unknown0 (0.0%)
Required1 (7.7%)
Privileges Required
Low4 (30.8%)
High7 (53.8%)
None2 (15.4%)
Unknown0 (0.0%)

Top CVEs

Signals from CVEs in this product scope (13 CVEs).

13 CVEs · Highest risk first

CVEPublishedCVSSRiskKEVExploit
Insufficient access control in a subsystem for Intel (R) processor graphics in 6th, 7th, 8th and 9th Generation Intel(R) Core(TM) Processor Families; Intel(R) Pentium(R) Processor
Nov 14, 20197.825NONO
Improper input validation in the Intel(R) SGX SDK applications compiled for SGX2 enabled processors may allow a privileged user to potentially escalation of privilege via local acc
Nov 17, 20216.723NONO
Hardware allows activation of test or debug logic at runtime for some Intel(R) processors which may allow an unauthenticated user to potentially enable escalation of privilege via
Nov 17, 20216.823NONO
Insufficient control flow in certain data structures for some Intel(R) Processors with Intel(R) Processor Graphics may allow an unauthenticated user to potentially enable informati
Jan 17, 20205.523NONO
Out-of-bounds read in the BIOS firmware for some Intel(R) Processors may allow an authenticated user to potentially enable escalation of privilege via adjacent access.
Nov 14, 20238.021NONO
Improper initialization in the Intel(R) TXT SINIT ACM for some Intel(R) Processors may allow a privileged user to potentially enable escalation of privilege via local access.
Feb 16, 20236.721NONO
Processor optimization removal or modification of security-critical code for some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure v
May 12, 20225.520NONO
Improper access control in the PMC for some Intel(R) Processors may allow a privileged user to potentially enable escalation of privilege via local access.
Nov 13, 20206.718NONO
Insufficient control flow management in the BIOS firmware for some Intel(R) Processors may allow a privileged user to potentially enable denial of service via local access.
Aug 11, 20234.417NONO
Improper isolation of shared resources in some Intel(R) Processors when using Intel(R) Software Guard Extensions may allow a privileged user to potentially enable information discl
Feb 16, 20234.417NONO

Exploit Exposure

Signals from CVEs in this product scope (13 CVEs).

CISA KEV
0 CVEs
0.0% of CVEs· Bottom 1%
Metasploit
0 CVEs
0.0% of CVEs· Bottom 1%
Nuclei
0 CVEs
0.0% of CVEs· Bottom 1%
ExploitDB
0 CVEs
0.0% of CVEs· Bottom 1%

Social Chatter

Signals from CVEs in this product scope (13 CVEs).

Media Mentions

Signals from CVEs in this product scope (13 CVEs).

Top CNAs Publishing CVEs For Celeron J1750 Firmware

Top CWEs

Versions

No cataloged versions.